Computer Hardware Logic

• Clocks
• Transistors
• Discreet Tried and True: 54/7400 series in various families
• ASICs Application Specific Integrated Circuits
• GAL Gate Array Logic
• PLDs Programmable Logic Devices
• CPLDs or FPGAs Complex Programmable Logic Devices or Field Programmable Gate Arrays

Components@
Sockets, Footprints, package types
Hardware - Emulation#Logic Simulators

Digital Logic Tutorial

There was an interesting interim period [in electronics design, especially video games] when they would use EPROMS - i.e. a microprocessor support chip - in non-micro applications. For example, they would often use them to store those jazzy lighting sequences for the front panel. The EPROM was built into the TTL/CMOS circuitry, rather than sitting on an address and data bus.

The EPROMS where used to simulate complex logic, just as an FPGA or GA can be used today

I've used EPROMS (and fuse link PROMS, remember them :-)) as logic replacement devices on occasion in the dim dark past. A VERY rapid state machine can be made with a package of D flip flops and an EPROM. Faster than many uPs for a limited task. An excellent example of such a beast (used a fuse link prom I think) was the Apple 2 floppy disk controller - The IWM - stood for Integrated Woz Machine (designed by Steve Wozniak) and used a state machine and no uP. Very very simple logic - much cheaper than the state of the art then and for some time which was the eg (ugh) WD1771 FDC. I have seen EPROM used in such designs occasionally in more recent times - EA mag I think used one as a divider to convert period to frequency in I think a car computer. Also useable for eg display decoders.

Wojciech Zabolotny says:

...it should be possible to prepare the project with a HDL which does not depend on the particular EPLD family (Verilog of VHDL). Now i see the following possibility:

1. Prepare & test the design with Verilog, using the v2k (http://www.v-ms.com/) or ver (http://daggit.pagecreator.com/ver/ver.html) or Icarus Verilog (http://www.icarus.com/eda/verilog/index.html)
2. Translate the tested design into ABEL (AFAIK such functionality is available in the "ver" package)
3. Compile the ABEL source with the free version of [Lattis] ispDesignExpert (well, it is not Open Source :-( ).
4. Download the obtained JEDEC file into the hardware. [Ed: See http://www.teleport.com/~thandley/Wilbure.htm#ispprog]

See also:

• http://8bitworkshop.com/v3.3.0/?platform=verilog&file=clock_divider.v In browser emulator lets you decide for a Lattice FPGA and simulate the result. Includes logic analyser or video output. Also emulate and code for several historic computers / game consoles.+
• https://hdlbits.01xz.net/wiki/Main_Page Learn the Verilog language for Digital Logic via a series of puzzles. You can login to keep your scores and share your progress.+
• http://www.sontrak.com Logic Friday is a freeware tool for students, hobbyists, and engineers which allows them to:
  • Enter a logic function as large as 16in x 16 outas a truth table, an equation, or a gate diagram
  • Minimize a function quickly or exactly, compare functions, and generate new functions as logical combinations of others
  • Automatically generate a multi-level minimized gate diagram using gates chosen from a library
  • View any function as a truth table, equation, or gate diagram and trace the state of each gate's outputs for a given input
  • Generate efficient, compact C code lookup functions from logic functions
  • Save functions and gate diagram images to files, export and import truth tables as CSV files.
• http://www.doc.ic.ac.uk/~nd/surprise_96/journal/vol4/cwl3/report.html Listing of quite a few digital logic circuits.+
• http://www.play-hookey.com/digital/ Very nice tutorial on digital logic+
• http://ozark.hendrix.edu/~burch/logisim/ Very nice GPL Java digital logic simulator.
• http://www.tetzl.de/java_logic_simulator.html Simple GPL Java digital logic simulator.
• "Simulation of Simple Digital Logic through a Computer-Aided Design System" by Robert McDermott, Byte magazine, January 1983 pg 396
• http://www.directories.mfi.com/gateways/pld/pld.txt
• Embedded Systems article intoducing Programmable Logic
• Digital filter design softare package
• App note from Xilinx which describes a 8250 UART core designed in ViewLogic schematics.
• Free? Intellectual Properties (applications for FGPAs or CPLDs)
  • http://www.scsise.wmin.ac.uk/~seamang/freehardware.html
  • http://www.cmosexod.com/
  • http://circu.its.tudelft.nl/
  • http://www.scsise.wmin.ac.uk/~seamang/freehardware.html
  • http://www.scrap.de/html/openip.htm
  • http://www.geocities.com/SiliconValley/Chip/5014/
  • http://www.vhdl.org/vi/fmf/
  • http://tech-www.informatik.uni-hamburg.de/vhdl/vhdl.html
  • http://dmoz.org/Computers/Open_Source/Hardware/
  • http://www.mindspring.com/~tcoonan freeware Verilog PIC CPU core
  • http://www.silicore.net. Pro PIC CPU core.
  • http://www.fpga-design.com/
• ftp://ftp.unina.it/pub/Other/electronics/ftp.armory.com/
• http://www.xilinx.com/xbrf/xbrf006.pdf This paper examines some general concepts concerning Phase Locked Loop (PLL) usage and their application in programmable logic devices. A critique of a newly-announced PLL implementation for FPGAs also is included.
• http://www.associatedpro.com

You think because you understand _one_ you must understand two. Because one and one make _two_. But you must also understand _and_. --Sufi Sage

Interested: +