Machine Language Instructions for the Intel 80x86 family of micro processors.
For more detailed information on these instructions:
Name Operands Machine encoding
----- --------------------- ---------------------------------------------------
AAA 00110111
AAD 11010101 00001010
AAM 11010100 00001010
AAS 00111111
Mpf Dst Src 00Mop0dw MdRegR/m {disp} {disp}
Mps R/m B/w 100000sw MdMopR/m {disp} {disp} data {data}
Mpf Accum B/w 00Mop10w data {data}
BOUND RgW Md 01100010 MdRgWR/m disp disp
CALL LblNear 11101000 disp disp
CALL LblFar 10011010 disp disp disp disp
CALL Rw/Mw 11111111 Md010R/m
CALL Md 11111111 Md011R/m
CBW 10011000
CLC 11111000
CLD 11111100
CLI 11111010
CMC 11110101
CMPSz 1010011z
CWD 10011001
DAA 00100111
DAS 00101111
DEC Rb/m 1111111w Md001R/m {disp} {disp}
DEC RgW 01001RgW
ENTER Word Byte 11001000 word------------ byte--
ESC Bit6 R/m 11011TTT MdLLLR/m
HLT 11110100
Rop R/m 1111011w MdRopR/m {disp} {disp}
IMUL Rb {Rb/Ms} B/w 011010s1 MdRegR/m {disp} {disp} data {data}
IN Accum B/w 1110010w data {data}
IN Accum DX 1110110w
INC Rb/m 1111111w Md000R/m
INC RgW 01000RgW
INSz 0110110z
INT Byte 11001101 data
INT 3 11001100
INTO 11001110
IRET 11001111
Jcond lblShrt 0111cond disp
JCXZ lblShrt 11100011 disp
JMP LblShrt 11101011 disp
JMP LblNear 11101001 disp disp
JMP LblFar 11101010 disp disp disp disp
JMP Rw/mn 11111111 Md100R/m
JMP FAR Md 11111111 Md101R/m
LAHF 10001111
LDS RgW Mn 11000101 MdRgWR/m disp disp
LES RgW Mn 11000100 MdRgWR/m disp disp
LEA RgW Mn 10001101 MdRgWR/m disp disp
LEAVE 11001001
LOCK 11110000
LODSz 1010110z
LOOPzz Short 111000zz disp
MOV Dst Src 100010dw MdRegR/m {DispLo} {DispHi}
MOV R/m B/w 1100011w Md000R/m {DispLo} {DispHi} Data {Data}
MOV wreg B/w 1011wreg Data {Data}
MOV Accum Lable 101000dw OffsetLo OffsetHi
MOV SegDst SegSrc 100011d0 MdSegR/m {DispLo} {DispHi}
MOVSz 1010010z
NOP 10010000
OUT Byte Accum 1110011w Data
OUT DX Accum 1110111w
OUTSz 0110111z
POP RgW 01011RgW
POP Rw/mn 10001111 Md000R/m {disp} {disp}
POP Seg 000sr111
POPA 01100001
POPF 10011101
PUSH RgW 01010RgW
PUSH Rw/mn 11111111 Md110R/m {disp} {disp}
PUSH Seg 000sr110
PUSH B/w 011010s0 Data {Data}
PUSHA 01100000
PUSHF 10011100
Ttt R/m 1 1101000w MdTttR/m {disp} {disp}
Ttt R/m CL 1101001w MdTttR/m {disp} {disp}
Ttt R/w Byte 1100000w MdTttR/m {disp} {disp} Data
REP StringInstruction 11110010
REPE StringComparison 11110011
REPNE StringComparison 11110010
RET NEAR 11000011
RET NEAR Word 11000010 Data Data
RET FAR 11001011
RET FAR Word 11001010 Data Data
SAHF 10011110
SCASB 10101110
SCASW 10101111
STC 11111001
STD 11111101
STI 11111011
STOSB 10101010
STOSW 10101011
TEST Reg R/m 1000011w MdRegR/m {disp} {disp}
TEST R/m B/w 1111011w Md000R/m {disp} {disp} Data {Data}
TEST Accum B/w 1010100w Data {Data}
WAIT 10011011
XCHG Reg R/m 1000011w MdRegR/m {disp} {disp}
XCHG Accum RgW 10010RgW
XLAT 11010111
| file: /Techref/intel/80x86ops.htm, 3KB, , updated: 2001/4/17 09:19, local time: 2024/12/27 14:30,
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